Adc And Dac – GATE ECE Digital Circuits Practice Questions & PYQs | BattleExam | BattleExam

A 4-bit weighted-resistor DAC with inputs $\mathrm{b}_{3}, \mathrm{~b}_{2}$ , $\mathrm{b}_{1}$ , and $\mathrm{b}_{0}$ (MSB to LSB) is designed using an ideal opamp, as shown below. The switches are closed when the corresponding input bits are logic '1' and open otherwise. When the input $\mathrm{b}_{3} \mathrm{~b}_{2} \mathrm{~b}_{1} \mathrm{~b}_{0}$ changes from 1110 to 1101, the magnitude of the change in the output voltage $\mathrm{V}_{\mathrm{O}}$ (in mV , rounded off to the nearest integer) is __________ .

🚀 Solve in Practice Mode

📖 Explanation

$V_{0}=-R\left(\frac{b_{3} V_{R E F}}{R}+\frac{b_{2} V_{R E F}}{2 R}+\frac{b_{1} V_{R E F}}{4 R}+\frac{b_{0} V_{R E F}}{8 R}\right)$ $=-\frac{\mathrm{V}_{\text {REF }} \times \mathrm{R}}{\mathrm{R}}\left[\mathrm{b}_{3}+\frac{\mathrm{b}_{2}}{2}+\frac{\mathrm{b}_{1}}{4}+\frac{\mathrm{b}_{0}}{8}\right]$ $=-V_{\text {REF }}\left[\mathrm{b}_{3}+\frac{\mathrm{b}_{2}}{2}+\frac{\mathrm{b}_{1}}{4}+\frac{\mathrm{b}_{0}}{8}\right]$ For the input $\mathrm{b}_{3} \mathrm{~b}_{2} \mathrm{~b}_{1} \mathrm{~b}_{0}=1110$ , the output voltage,

\begin{aligned} \mathrm{V}_{0} & =-2\left(1+\frac{1}{2}+\frac{1}{4}+0\right) \\ & =-2(1.75) \\ & =-3.5 \mathrm{~V} \end{aligned}

For the input $\mathrm{b}_{3} \mathrm{~b}_{2} \mathrm{~b}_{1} \mathrm{~b}_{0}=1101$ , the output voltage,

\begin{aligned} \mathrm{V}_{0} & =-2\left(1+\frac{1}{2}+0+\frac{1}{8}\right) \\ & =-2(1.625) \\ & =-3.25 \mathrm{~V} \end{aligned}

So, the change in magnitude is 0.25 V and it is equal to 250 mV.