Match each addressing mode in with a data element or an element of a data structure (in a high-level language) in :
GATE CSE · Computer Organization Architecture
Practice problems for Addressing Modes in Computer Organization & Architecture.
23 questions · 20 PYQs · 0 AI practice · GATE CSE 2027
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Match each addressing mode in with a data element or an element of a data structure (in a high-level language) in :
The immediate addressing mode can be used for 1. Loading internal registers with initial values 2. Perform arithmetic or logical operation on data contained in instructions Which of the following is true?
A stack organized computer is characterised by instructions with
An array of 2 two byte integers is stored in big endian machine in byte addresses as shown below. What will be its storage pattern in little endian machine ?
The most appropriate matching for the following pairs:
Consider the C struct defined below: struct data { int marks [100] ; char grade; int cnumber; }; struct data student; The base address of student is available in register R1. The field student.grade can be accessed efficiently using
Consider a RISC machine where each instruction is exactly 4 bytes long. Conditional and unconditional branch instructions use PC- relative addressing mode with Offset specified in bytes to the target location of the branch instruction. Further the Offset is always with respect to the address of the next instruction in the program sequence. Consider the following instruction sequence. If the target of the branch instruction is i, then the decimal value of the Offset is __________

For computers based on three-address instruction formats, each address field can be used to specify which of the following: (S1) A memory operand (S2) A processor register (S3) An implied accumulator register
Consider a hypothetical processor with an instruction of type LW R1, 20(R2), which during execution reads a 32-bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of constant 20 and the contents of register R2. Which of the following best reflects the Addressing Modes implemented by this instruction for the operand in memory?
MOV [BX], AL type of data addressing is called ?
In which addressing mode, the effectives address of the operand is generated by adding a constant value to the content of a register?
Which of the following is/are true of the auto-increment addressing mode? I. It is useful in creating self-relocating code II. If it is included in an Instruction Set Architecture, then an additional ALU is required for effective address calculation III. The amount of increment depends on the size of the data item accessed
Which of the following is/are true of the auto-increment Addressing Modes? I. It is useful in creating self-relocating code II. If it is included in an Instruction Set Architecture, then an additional ALU is required for effective address calculation III. The amount of increment depends on the size of the data item accessed
In the Big-Endian system, the computer stores
Which of the following statements about relative addressing mode is FALSE?
Match each of the high level language statements given on the left hand side with the most natural Addressing Modes from those listed on the right hand side. 1 A[1] = B[J]; a Indirect addressing 2 while [*A++]; b Indexed, addressing 3 int temp = *x; c Autoincrement
Which of the following Addressing Modess are suitable for program relocation at run time? (i) Absolute addressing (ii) Based addressing (iii) Relative addressing (iv) Indirect addressing
In the absolute the Addressing Modes :
Which is the most appropriate match for the items in the first column with the items in the second column

The most appropriate matching for the following pairs is:
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