Semiconductor Electronics – JEE Main PhysicsPractice Questions & PYQs

Applying De Morgan's theorem to the expression $Z = \overline{A} \cdot \overline{B}$, which represents the inverted inputs processed through an AND gate, yields the simplified form $Z = \overline{A+B}$. This mathematical result defines the behavior of a NOR gate, where the output remains high only when both inputs are at a logic zero state. Consequently, the circuit performs the NOR logic operation by effectively producing the inverse of an OR combination of the inputs.

Kirchhoff's voltage law establishes the relationship between the components in the circuit, which leads to the loop equation $10 \sin \omega t - V_R - 3 = 0$. By rearranging this expression, we find that the voltage across the resistor is $V_R = 10 \sin \omega t - 3$ during periods when the diode is forward-biased. When evaluating this equation at the initial time $t=0$, the voltage becomes $-3\,\mathrm{V}$. Furthermore, because the input voltage is insufficient to maintain a forward bias across the diode during the interval from $t = \frac{T}{2}$ to $T$, the diode remains reverse-biased throughout this period, causing the voltage across the resistor to drop to $0\,\mathrm{V}$. Since none of the presented waveform options illustrate this specific behavior of beginning at $-3\,\mathrm{V}$ and remaining at $0\,\mathrm{V}$ for the latter half of the cycle, the available graphs are not accurate.

To initiate the generation of electron-hole pairs within a semiconductor, an incident photon must possess energy at least equal to the material's band gap. Since the junction's reverse biased current increases when exposed to light with a wavelength up to $621 \text{ nm}$, this threshold wavelength corresponds directly to the minimum photon energy required to overcome the energy gap. Using the relationship between energy and wavelength, where the product of Planck's constant and the speed of light is approximately $1242 \text{ eV}\cdot\text{nm}$, the calculation follows:

$E_g = \frac{1242 \text{ eV}\cdot\text{nm}}{621 \text{ nm}}$

$E_g = 2 \text{ eV}$

Silicon diodes function as selective switches where forward bias permits current flow with a constant potential drop of $0.7\ \mathrm{V}$, whereas reverse bias acts as an open circuit that blocks current. When point $X$ is connected to the battery's positive terminal, $D_1$ becomes forward-biased and $D_2$ becomes reverse-biased, effectively excluding the $D_2$ branch from the active circuit path.

The remaining path consists of the $5\ \mathrm{V}$ source in series with $D_1$ and a $10\ \Omega$ resistor. Applying Kirchhoff's voltage law around this closed loop results in the equation $5 - 0.7 - 10I = 0$. Solving this expression gives $4.3 = 10I$, which results \in a current of $I = 0.43\ \mathrm{A}$ supplied by the battery.

This circuit operates by applying Boolean laws to the input signals before inverting the combined result. By processing inputs $A$ and $B$ through a configuration that simplifies to $\overline{\overline{A} \cdot \overline{B}} = A + B$, the internal stage effectively performs an OR operation. Applying a final negation to this result yields the expression $Y = \overline{A + B}$, which matches the functional logic of a NOR gate.

The fundamental behavior of a bipolar junction transistor relies on the conservation of charge, where the total change in current flowing out of the emitter is simply the sum of the changes in currents leaving through the base and the collector. This relationship is defined by the equation $\Delta I_E = \Delta I_B + \Delta I_C$. In this context, the common base current gain is defined as $\alpha = \frac{\Delta I_C}{\Delta I_E}$, while the common emitter current gain is defined as $\beta = \frac{\Delta I_C}{\Delta I_B}$. These parameters characterize how changes in collector current are controlled relative to inputs at either the emitter or the base.

To derive the relationship between these two gains, we rearrange the charge conservation equation by dividing every term by the change in collector current. This operation results in $\frac{\Delta I_E}{\Delta I_C} = \frac{\Delta I_B}{\Delta I_C} + \frac{\Delta I_C}{\Delta I_C}$, which simplifies to $\frac{\Delta I_E}{\Delta I_C} = \frac{\Delta I_B}{\Delta I_C} + 1$. By observing that $\frac{\Delta I_E}{\Delta I_C}$ is the reciprocal of $\alpha$ and $\frac{\Delta I_B}{\Delta I_C}$ is the reciprocal of $\beta$, we obtain the expression $\frac{1}{\alpha} = \frac{1}{\beta} + 1$. Combining the terms on the right side gives $\frac{1}{\alpha} = \frac{1 + \beta}{\beta}$, and inverting this fraction yields the final result $\alpha = \frac{\beta}{1+\beta}$.

Boolean algebra provides the framework for determining the output of complex gate combinations by tracing how signals are processed. In this circuit, the inputs $A$ and $B$ combine to produce the expression $Y = \overline{A \cdot B}$, which is the defining equation for a NAND gate. This relationship is further confirmed by a truth table, which demonstrates that the output is high for all input conditions except when both $A$ and $B$ are high.

To ensure a Zener diode operates safely without exceeding its power rating, we must limit the current flowing through it. The power dissipation follows the principle $P = V_Z I_Z$, which, given the breakdown voltage of 10 V and a maximum power of 2 W, establishes that the maximum permissible Zener current is 0.2 A.

When regulating an input voltage that rises as high as 14 V, the series resistor must drop the excess voltage to maintain a safe current. At this maximum input of 14 V, the voltage across the resistor becomes 4 V, which is the difference between the source voltage and the Zener breakdown voltage. By applying the relationship $R_S = \frac{V_{\in} - V_Z}{I_Z}$, we find that $R_S = 20\ \Omega$ is required to protect the diode across its full operating range.

When a Zener diode is placed in parallel with a circuit element, it maintains a constant voltage across that branch equal to its rated breakdown value of 30 V. The current through the 5,000 Ohm resistor is determined by Ohm's Law as $I_1 = \frac{30}{5000} = 6 \text{ mA}$.

The remaining voltage from the 90 V supply drops across the 4,000 Ohm series resistor, resulting in a potential difference of 60 V. With this voltage, the total current drawn from the source is calculated as $I = \frac{60}{4000} = 15 \text{ mA}$. Since the total current splits between the parallel resistor and the Zener diode, the current through the diode is $I_z = 15 - 6 = 9 \text{ mA}$.

Boolean algebra allows us to simplify complex circuit expressions to identify their underlying logic gate behavior. The circuit yields an output of $Y = (\overline{A \cdot B}) \cdot (A + B)$, which simplifies via De Morgan's theorem to $(\overline{A} + \overline{B}) \cdot (A + B)$. Expanding this expression results in $A \cdot \overline{A} + \overline{A} \cdot B + A \cdot \overline{B} + B \cdot \overline{B}$, which reduces to $\overline{A} \cdot B + A \cdot \overline{B}$ because the product of any variable and its complement is zero, identifying the configuration as an XOR gate.

The dynamic resistance of a diode describes how its opposition to current flow changes with voltage, which is determined by calculating the reciprocal of the slope of the current-voltage characteristic curve. This relationship is given by the formula $R_d = \Delta V / \Delta I$. By identifying two points on the characteristic curve around the operating point, the change in voltage is $\Delta V = 0.75 - 0.65 = 0.1$ V. The corresponding change in current is $\Delta I = 5 - 1 = 4$ mA, or $4 \times 10^{-3}$ A. Substituting these values results in the final calculation $R_d = \frac{0.1}{4 \times 10^{-3}} = 25 \Omega$

A transistor acts as an effective amplifier only when it operates within its active region, where it can linearly control the output signal relative to the input. In this configuration, the emitter-base junction is forward biased and the collector-base junction is reverse biased, which creates the necessary condition $I_C = \beta I_B$. This specific mode ensures the collector current remains a direct, amplified multiple of the base current, allowing the circuit to achieve the high current and voltage gains required for signal amplification. Operating in either cut-off or saturation would fail to maintain this consistent linear relationship, making the active region the only functional choice for the device to perform as an amplifier.

Digital logic circuits function by processing binary inputs through combinations of gates that perform specific boolean operations, such as logical addition and inversion. With $A=0$ and $B=1$, the output expression $(\overline{0+1})(0+1)$ simplifies by first solving the parenthetical operations. The term $(\overline{0+1})$ reduces to $\overline{1}$, which is $0$, while the second term $(0+1)$ results in $1$. Multiplying these values gives $0 \cdot 1$, establishing that $x$ is $0$.

The function $Y = A + \overline{B}$ operates as a Boolean OR gate where the output is determined by whether $A$ is high or $B$ is low, effectively simplifying the logic to a state of 1 whenever $A$ is 1 or $B$ is 0. By evaluating each input pair, when $A$ and $B$ are both 0, the inversion of $B$ yields 1, forcing the output $Y$ to 1, whereas the input combination of 0 and 1 results in 0 because neither condition for a high output is met. Since $A$ being 1 makes the expression true regardless of $B$, the output remains 1 for both remaining input pairs of 10 and 11, resulting in the final sequence of 1, 0, 1, 1.

A Zener diode in this circuit configuration acts as a voltage regulator by maintaining a constant potential difference across itself, which forces the series resistor to drop the difference between the supply voltage and the Zener voltage. With a 50 V supply and a 5 V Zener diode, the series resistor must consistently sustain a voltage drop of 45 V. To determine the minimum resistance required to keep the diode within its safe operating current of 90 mA, we consider the scenario where the load current is zero, meaning the entire current through the resistor flows through the Zener diode.

Using Ohm's law, we calculate the resistance by dividing this constant voltage drop by the maximum permissible current. By substituting the values into the equation $R = \frac{45}{0.09}$, we find that the minimum resistance required is 500 Ohms.

The emission of light from an LED occurs when electrons drop across the semiconductor band gap, releasing energy in the form of a photon. The wavelength of this photon is inversely proportional to the energy gap, a relationship expressed by the formula $E = \frac{hc}{\lambda}$.

To determine the wavelength, first convert the energy gap from electron-volts into Joules by multiplying 1.9 by $1.6 \times 10^{-19}$ J. Rearranging the governing equation to solve for the wavelength gives:
$\lambda = \frac{hc}{E}$
Substituting the standard values for Planck's constant of $6.63 \times 10^{-34}$ Js, the speed of light of $3 \times 10^{8}$ m/s, and the calculated energy in Joules results in the following calculation:
$\lambda = \frac{6.63 \times 10^{-34} \times 3 \times 10^{8}}{1.9 \times 1.6 \times 10^{-19}}$
This computation yields approximately $654 \times 10^{-9}$ m, which is equivalent to 654 nm. Because light at 654 nm falls within the red portion of the visible electromagnetic spectrum, the emitted light is red.

Evaluating the output of this logic circuit depends on the Boolean expression $Y = \overline{AB \cdot (A+B)}$, which simplifies through De Morgan's theorem to $\overline{A} + \overline{B} + \overline{A} \cdot \overline{B}$. This relationship defines the final state for every specific combination of the binary inputs $A$ and $B$.

For the input pair $(0,0)$, both the product term $AB$ and the sum term $(A+B)$ are $0$, so their product is $0$ and the inverted output becomes $1$. With inputs $(0,1)$, the term $AB$ is $0$ and $A+B$ is $1$, which results in a product of $0$ and a final inverted output of $1$. For the $(1,0)$ input combination, the term $AB$ is $0$ while $A+B$ is $1$, leading again to a product of $0$ and an output of $1$. Finally, when both inputs are $(1,1)$, the product $AB$ is $1$ and the sum $A+B$ is $1$, resulting in a product of $1$ that inverts to an output of $0$.

The current gain of a transistor in the common-emitter configuration, denoted by $\beta$, represents the amplification factor and is defined as the ratio of the change in collector current to the change in base current, given by the formula $\beta = \frac{\Delta I_C}{\Delta I_B}$. By observing the provided characteristic curves, we identify the change in collector current as 2 mA, derived from the difference between 4 mA and 2 mA, and the change in base current as 10 $\mu$A, calculated from the difference between 20 $\mu$A and 10 $\mu$A. Dividing the change in collector current by the change in base current, while ensuring consistent units, yields an estimated current gain of 200.

The AND logic operation functions as a logical conjunction, where the output signal is high ($1$) strictly when all input signals are concurrently high ($1$). In terms of Boolean algebra, this is expressed as $Y = A \cdot B$, such that the output remains low ($0$) if any single input is low, distinguishing it from other logic gates like OR, NAND, or NOR.

The band gap energy of a semiconductor corresponds to the minimum energy required to excite an electron from the valence band to the conduction band, which is inversely proportional to the maximum wavelength of incident light. This physical principle is expressed by the formula $E_g = \frac{hc}{\lambda}$ where $h = 6.63 × 10^{-34}\,\mathrm{J}\cdot\mathrm{s}$, $c = 3 × 10^{8}\,\mathrm{m/s}$, and the threshold wavelength $\lambda = 400 × 10^{-9}\,\mathrm{m}$. By substituting these values into the expression, the energy is determined \in Joules and subsequently converted to electron-volts by dividing by the elementary charge of $1.6 × 10^{-19}\,\mathrm{C}$, resulting in a band gap energy of 3.1 eV.