In the circuit, is an ideal current source. The transistors and are assumed to be biased in saturation, wherein is the input signal and is fixed DC voltage. Both transistors have a small signal resistance of and trans-conductance of . The small signal output impedance of this circuit is

Given From resistance reflection rule,

A. $2 \mathrm{r}_{\mathrm{ds}}$

B. $\frac{1}{\mathrm{~g}_{\mathrm{m}}}+\mathrm{r}_{\mathrm{ds}}$

C. $g_{m} \mathrm{r}_{\mathrm{ds}}^{2}+2 \mathrm{r}_{\mathrm{ds}}$

GATE EE · Analog Electronics

Small Signal Analysis – GATE EE Analog ElectronicsPractice Questions & PYQs

Generate GATE-level questions on Transistor amplifiers. Focus on: 1. Hybrid-pi and h-parameter models for BJT. 2. Small signal analysis of CE, CB, and CC configurations. 3. FET amplifiers (CS, CD) and Frequency response basics.

5 questions · 5 PYQs · 0 AI practice · GATE EE 2027

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Q1GATE 2025MCQ

In the circuit, $\mathrm{I}_{\mathrm{DC}}$ is an ideal current source. The transistors $\mathrm{M}_{1}$ and $\mathrm{M}_{2}$ are assumed to be biased in saturation, wherein $V_{i n}$ is the input signal and $V_{D C}$ is fixed DC voltage. Both transistors have a small signal resistance of $\mathrm{r}_{\mathrm{ds}}$ and trans-conductance of $\mathrm{g}_{\mathrm{m}}$ . The small signal output impedance of this circuit is

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📖 Explanation

Given

\begin{aligned} & \mathrm{r}_{01}=\mathrm{r}_{02}=\mathrm{r}_{\mathrm{ds}} \\ & \mathrm{~g}_{\mathrm{m} 1}=\mathrm{g}_{\mathrm{m} 2}=\mathrm{g}_{\mathrm{m}} \end{aligned}

From resistance reflection rule,

\begin{aligned} \mathrm{R}_{\mathrm{eq}} & =\left(1+\mathrm{g}_{\mathrm{m}} \mathrm{r}_{01}\right) \mathrm{r}_{02}+\mathrm{r}_{01} \\ & =\mathrm{r}_{0}+\mathrm{g}_{\mathrm{m}} \mathrm{r}_{0}{ }^{2}+\mathrm{r}_{0} \\ & =\mathrm{g}_{\mathrm{m}} \mathrm{r}_{0}{ }^{2}+2 \mathrm{r}_{0} \\ & =\mathrm{g}_{\mathrm{m}} \mathrm{r}_{\mathrm{ds}}{ }^{2}+2 \mathrm{r}_{\mathrm{ds}} \end{aligned}

Q2GATE 2025MCQ

Which one of the following statement is true about the small signal voltage gain of a MOSFET based single stage amplifier?

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Q3GATE 2022MCQ

For an ideal MOSFET biased in saturation, the magnitude of the small signal current gain for a common drain amplifier is

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📖 Explanation

For ideal MOSFET, $i_G=0$ Therefore, Current gain, $A_I=\frac{i_s}{i_G}=\infty$

Q4GATE 2014MCQ

The magnitude of the mid-band voltage gain of the circuit shown in figure is (assuming $h_{fe}$ of the transistor to be 100)

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📖 Explanation

AC model, $\; \; \; \; Z_{i}=10\, k\Omega$ Mid band voltage gain $\; \; \; \; A_{v}=\frac{A_{I}R_{L}}{Z_{i}}$ $\; \; \; \; A_{v}=\frac{-h_{fe}R_{L}}{Z_{i}} =\frac{-100\times 10\, k\Omega }{10\, k\Omega }=-100$ $\; \; \; \; \left | A_{v} \right |=100$

Q5GATE 2001MCQ

In the single-stage transistor amplifier circuit shown in figure, the capacitor $C_{E}$ is removed. Then, the ac small-signal midband voltage gain of the amplifier

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📖 Explanation

$\frac{A_{V_1}}{A_{V_1}}=1+\left ( \frac{1+h_{fe}}{h_{ie}} \right )R_{e}$ $\frac{A_{V_{1}}}{A_{V_{2}}}> 1$ $\Rightarrow \; A_{V_{2}} \lt A_{V_{1}}$

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